Impact of PZT gate‐stack induced negative capacitance on analogue/RF figures‐of‐merits of electrostatically‐doped ferroelectric Schottky‐barrier tunnel FET-Reference-Cited by-同舟云学术

Impact of PZT gate‐stack induced negative capacitance on analogue/RF figures‐of‐merits of electrostatically‐doped ferroelectric Schottky‐barrier tunnel FET

Published:2019-05-28 Issue:4 Volume:13 Page:435-441
ISSN:1751-858X
Container-title:IET Circuits, Devices & Systems
language:en
Short-container-title:IET Circuits, Devices & Systems

Author:

Singh Sangeeta¹²,Sinha Ruchir³,Kondekar Pravin Neminath³

Affiliation:

1. Electronics and Communication Engineering DepartmentIndian Institute of Information TechnologyKotaRajasthanIndia

2. Microelectronics and VLSI Lab.National Institute of TechnologyPatnaBiharIndia

3. Nanoelectronics and VLSI Lab.IIITDMJablapurMadhya PradeshIndia

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Control and Systems Engineering

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cds.2018.5276

Reference27 articles.

1. Schottky Tunneling Source MOSFET Design for Mixed Mode and Analog Applications

2. Asymmetric Schottky Tunneling Source SOI MOSFET Design for Mixed-Mode Applications

3. Schottky barrier height modulation using dopant segregation in schottky-barrier SOI-MOSFETs

4. Impact of a Pocket Doping on the Device Performance of a Schottky Tunneling Field-Effect Transistor

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