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VLSI Architecture of Full‐Search Variable‐Block‐Size Motion Estimation for HEVC Video Encoding

  • Published:2017-04-24 Issue:6 Volume:11 Page:543-548
  • ISSN:1751-858X
  • Container-title:IET Circuits, Devices & Systems
  • language:en
  • Short-container-title:IET Circuits, Devices & Systems

Author:

Cheeckottu Vayalil Niras1,Kong Yinan1

Affiliation:

1. Department of EngineeringMacquarie UniversitySydney2109NSWAustralia

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Control and Systems Engineering

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An efficient versatile video coding motion estimation hardware;Journal of Real-Time Image Processing;2024-01-29

2. H.264 Video Coding-Based Motion Estimation Architecture for Video Broadcasting from a Studio;Wireless Personal Communications;2020-06-09

3. Hybrid Scratchpad Video Memory Architecture for Energy-Efficient Parallel HEVC;IEEE Transactions on Circuits and Systems for Video Technology;2019-10

4. High-Efficient Video Transmission for HDTV Broadcasting;The Future of Television - Convergence of Content and Technology;2019-03-13
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