Low-power algorithm for automatic topology generation for application-specific networks on chips

Author:

Chang K.-C.,Chen T.-F.

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Reference31 articles.

Cited by 29 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Energy-aware application mapping methods for mesh-based hybrid wireless network-on-chips;The Journal of Supercomputing;2024-04-04

2. An Artificial Bee Colony Based Mapping Method for Three Dimensional Network-on-Chip;2023 International Conference on Emerging Trends in Networks and Computer Communications (ETNCC);2023-08-16

3. Novel fault tolerance topology using corvus seek algorithm for application specific NoC;Integration;2023-03

4. Discrete Firefly Algorithm for Optimizing Topology Generation and Core Mapping of Network-on-Chip;Intelligent Automation & Soft Computing;2022

5. Comparison of 2D Mesh and Reconfigurabl Mesh Topologies for Network on Chip Design;2020 5th International Conference on Computer Science and Engineering (UBMK);2020-09

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