Multi-mode-segmented scan architecture with layout-aware scan chain routing for test data and test time reduction
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
https://digital-library.theiet.org/content/journals/10.1049/iet-cdt_20070115?crawler=true&mimetype=application/pdf
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1. Low Power Test Compression Technique for Designs with Multiple Scan Chain
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1. Physical Aware Approaches for Speeding up Scan Shift Operation in SoC;ETRI Journal;2016-01-19
2. Multiple Scan Trees Synthesis for Test Time/Data and Routing Length Reduction Under Output Constraint;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2010-04
3. Nano-scale quasi-melting of alkali-borosilicate glasses under electron irradiation;Journal of Nuclear Materials;2010-01
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