1. Jacob, B., Ng, S., and Wang, D.: ‘Memory systems: cache, DRAM, disk’, (Morgan Kaufmann 2007)
2. Intel Corporation: ‘Intel XScale microarchitecture’, 3rd Generation Intel XScale Microarchitecture, Developer's Manual, May 2007, http://download.intel.com/design/intelxscale/31628302.pdf
3. ARM Ltd.: ‘ARM920T technical reference manual’, 2001, http://infocenter.arm.com/help/topic/com.arm.doc.ddi0151cARM920T_ TRM1_S.pdf
4. Compiler-directed code restructuring for reducing data TLB energy