Design of an extended 2D mesh network‐on‐chip and development of A fault‐tolerantrouting method-Reference-Cited by-同舟云学术

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Design of an extended 2D mesh network‐on‐chip and development of A fault‐tolerantrouting method

Published:2019-04-11 Issue:3 Volume:13 Page:224-232
ISSN:1751-8601
Container-title:IET Computers & Digital Techniques
language:en
Short-container-title:IET Computers & Digital Techniques

Author:

Kurokawa Yota¹,Fukushi Masaru¹

Affiliation:

1. Graduate School of Sciences and Technology for InnovationYamaguchi UniversityTokiwadai 2‐16‐1, UbeYamaguchi755‐8611Japan

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cdt.2018.5032

Reference24 articles.

1. Communication in multicomputers with nonconvex faults;Charasani S.;IEEE Trans. Comput.,1997

2. Lee D. Parikh R. Bertacco V.: ‘Highly fault‐tolerant NoC routing with application‐aware congestion management’.Proc. of the 9th Int. Symp. on Networks‐on‐Chip Vancouver Canada September2015 pp.1–8

3. Non‐minimal,turn‐model based NoC routing;Tasi W.C.;Microprocess. Microsyst.,2013

4. The turn model for adaptive routing

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Comparative Analysis of 2D Mesh Topologies with Additional Communication Links for On-Chip Networks;Computer Networks;2024-01

2. Bufferless NoCs with Scheduled Deflection Routing;2020 14th IEEE/ACM International Symposium on Networks-on-Chip (NOCS);2020-09-24

3. A degradable NoC router for the improvement of fault-tolerant routing performance;Artificial Life and Robotics;2019-11-30

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