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FPGA accelerator for floating-point matrix multiplication

  • Published:2012 Issue:4 Volume:6 Page:249
  • ISSN:1751-8601
  • Container-title:IET Computers & Digital Techniques
  • language:en
  • Short-container-title:IET Comput. Digit. Tech.

Author:

Jovanović Ž.,Milutinović V.

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 39 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Efficient 8-bit Matrix Multiplication on Intel Agilex-5 FPGAs;2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2024-05-05

2. FPGA-Accelerated Erasure Coding Encoding in Ceph Based on an Efficient Layered Strategy;Electronics;2024-01-31

3. FPGA Accelerated Automotive ADAS Sensor Fusion;2023 IEEE 12th International Conference on Communication Systems and Network Technologies (CSNT);2023-04-08

4. Implementation of Floating‐Point Arithmetic Processing on Content Addressable Memory‐Based Massive‐Parallel SIMD matriX Core;IEEJ Transactions on Electrical and Electronic Engineering;2023-01-03

5. FPGA Accelerator for Machine Learning Interatomic Potential-Based Molecular Dynamics of Gold Nanoparticles;IEEE Access;2022
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