Efficient implementation of bit‐parallel fault tolerant polynomial basis multiplication and squaring over GF(2 m )-Reference-Cited by-同舟云学术

Efficient implementation of bit‐parallel fault tolerant polynomial basis multiplication and squaring over GF(2 m )

Author:

Rashidi Bahram¹,Sayedi Sayed Masoud¹,Rezaeian Farashahi Reza²³

Affiliation:

1. Department of Electrical and Computer EngineeringIsfahan University of TechnologyIsfahan84156‐83111Iran

2. Department of Mathematical SciencesIsfahan University of TechnologyIsfahan84156‐83111Iran

3. School of MathematicsInstitute for Research in Fundamental Sciences (IPM)P.O.Box 19395‐5746TehranIran

Funder

Instituto Politécnico de Macau

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

Reference27 articles.

1. Carpiluppi M.: ‘Fault Tolerance in large scale systems: hybrid and distributed approaches’.A PhD thesis University of Bologna 2007

2. A survey of fault tolerant methodologies for FPGAs;Cheatham A.A.;ACM Trans. Des. Autom. Electron. Syst.,2006

3. Fault detection multipliers in polynomial and normal basis;Shelly S.;Int. J. Comput. Appl. (0975‐8887),2010

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