Extending multi‐level STT‐MRAM cell lifetime by minimising two‐step and hard state transitions in hot bits-Reference-Cited by-同舟云学术

Extending multi‐level STT‐MRAM cell lifetime by minimising two‐step and hard state transitions in hot bits

Published:2017-10-16 Issue:6 Volume:11 Page:214-220
ISSN:1751-8601
Container-title:IET Computers & Digital Techniques
language:en
Short-container-title:IET Computers & Digital Techniques

Author:

Ahmad Imtiaz¹,Imdoukh Mahmoud¹,Alfailakawi Mohammad Gh.¹

Affiliation:

1. Computer Engineering DepartmentKuwait UniversityAl‐khaldiyaKuwait

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cdt.2017.0089

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5. Hosomi M. Yamagishi H. Yamamoto T. et al.: ‘A novel nonvolatile memory with spin torque transfer magnetisation switching: spin‐ram’.IEEE Int. Electron Devices Meeting 2005 pp.459–462

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