Sub-10 ps high-gain direct coupled Josephson logic gate
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/el_19830203?crawler=true&mimetype=application/pdf
Reference6 articles.
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Applications of synchronized switching in series-parallel-connected Josephson junctions;IEEE Transactions on Electron Devices;1990
2. Josephson modified variable threshold logic gates for use in ultra-high-speed LSI;IEEE Transactions on Electron Devices;1989
3. A 4-bit×4-bit multiplier and 3-bit counter in Josephson threshold logic;IEEE Journal of Solid-State Circuits;1987-08
4. 3.0 ps switching operation in all-Nb Josephson logic gates;Electronics Letters;1987
5. A 4.2-ps logic gate using new Pb-alloy Josephson IC technology;IEEE Electron Device Letters;1985-02
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