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PTM: Technology mapper for pass-transistor logic

  • Published:1999 Issue:1 Volume:146 Page:13
  • ISSN:1350-2387
  • Container-title:IEE Proceedings - Computers and Digital Techniques
  • language:en
  • Short-container-title:IEE Proc., Comput. Digit. Tech.

Author:

Zhuang N.,Scotti M.V.,Cheung P.Y.K.

Publisher

Institution of Engineering and Technology (IET)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Theoretical Computer Science

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Reversed signal propagation BDD based low-power pass-transistor logic synthesis;IEEJ Transactions on Electrical and Electronic Engineering;2013

2. Performance Analysis of Reversed Binary Decision Diagram Pass Transistor Logic Synthesis;International Journal of Circuit Theory and Applications;2011-11-14

3. Modelling the operation of pass transistor and CPL gates;International Journal of Electronics;2001-09
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