8 Gbit/s CMOS interface for parallel fibre-optic interconnects
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/el_19961502?crawler=true&mimetype=application/pdf
Reference4 articles.
1. IEEE New York‘IEEE Standard for scalable coherent interface (SCI)’, 1596-1992, 1992
2. Tech. Committee of Accredited Standards‘High-performance parallel interface - 6400 Mbit/s physical layer (HIPPI-6400-PH)’, X3T11, May 1996
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A gigabyte-per-second parallel fiber optic network interface for multimedia applications;IEEE Network;1999
2. Vertical-cavity surface-emitting lasers flip-chip bonded to gigabit-per-second CMOS circuits;IEEE Photonics Technology Letters;1999-01
3. Fiber-optic interconnection networks for signal processing applications;Lecture Notes in Computer Science;1999
4. Low-power 2.5 Gbit/s VCSEL driver in 0.5 [micro sign]m CMOS technology;Electronics Letters;1998
5. Skewless optical data-link subsystem for massively parallel processors using 8 Gb/s x 1.1 Gb/s MMF array optical module;IEEE Photonics Technology Letters;1997-12
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