Iterative synthesis method for high‐directivity symmetrical stepped‐impedance microstrip parallel‐line coupler

Abstract

AbstractTraditional quarter‐wavelength parallel‐line couplers (QWPLC) in microstrip form suffer heavily in low directivity because of unbalanced even‐mode and odd‐mode phase velocities. Related schemes to improve directivity lead to complex structures and large dimensions. This study derives and validates an iterative synthesis method to design a high‐directivity microstrip coupler adopting a symmetric stepped‐impedance microstrip coupled line (SSIMCL). Given that the even‐mode and odd‐mode effective dielectric constants (EDCs) vary with the characteristic impedances, the authors take the EDCs of traditional QWPLC as the initial values for an SSIMCL, and the characteristic impedances and EDCs can be computed and converged in several iterations, resulting in good phase delay balance and high coupler directivity. A 20‐dB microstrip coupler working at 1 GHz with high directivity is designed, fabricated, and measured. The obtained maximum directivity is 47 dB and approximately 1 GHz, while the relative bandwidth with a directivity higher than 20 dB and a return loss better than 20 dB is larger than 70%. The novel microstrip coupler also features a compact, simple structure shorter than λg/4.