CMOS dynamic ternary circuit with full logic swing and zero-static power consumption
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/el_19980754?crawler=true&mimetype=application/pdf
Reference4 articles.
1. Current-mode CMOS multiple-valued logic circuits
2. CMOS ternary dynamic differential logic
3. Design and application of pipelined dynamic CMOS ternary logic and simple ternary differential logic
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2. Dynamic Quaternary Circuit with Neuron-MOS Transistor;2015 11th International Conference on Computational Intelligence and Security (CIS);2015-12
3. Ternary Flip-Flops Based on Emerging Sub-32 nm Technology Nodes;Journal of Low Power Electronics;2014-12-01
4. Neuron-MOS-based Dynamic Circuits for Multiple-Valued Logic;2014 Tenth International Conference on Computational Intelligence and Security;2014-11
5. Design of Dynamic Digital Circuits with n-Channel Multiple-Input Floating-Gate Transistors;2014 IEEE 12th International Conference on Dependable, Autonomic and Secure Computing;2014-08
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