Practical comparison of differential power analysis techniques on an ASIC implementation of the AES algorithm

Author:

Lu Y.,Boey K.H.,O'Neill M.,McCanny J.V.

Publisher

IET

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Survey on Hardware Security Techniques for Preventing Reverse Engineering Attacks;2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT);2023-04-17

2. Analog-Inspired Hardware Security: A Low-Energy Solution for IoT Trusted Communications;2021 IEEE 34th International System-on-Chip Conference (SOCC);2021-09-14

3. Methods and Analysis of Automated Trace Alignment Under Power Obfuscation in Side Channel Attacks;Journal of Hardware and Systems Security;2021-06

4. Embedded electronic circuits for cryptography, hardware security and true random number generation: an overview;International Journal of Circuit Theory and Applications;2016-12-13

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