Integratable trench MOSFET with ultra‐low specific on‐resistance
Author:
Affiliation:
1. State Key Laboratory of Electronic Thin Films and Integrated DevicesUniversity of Electronic Science and Technology of ChinaChengdu610054SichuanPeople's Republic of China
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/el.2015.1493
Reference10 articles.
1. Low on‐resistance SOI dual‐trench‐gate MOSFET;Luo X.;IEEE Trans. Electron Devices,2012
2. An improved superjunction structure with variation vertical doping profile;Lin Z.;IEEE Trans. Electron Devices,2015
3. Variation of lateral width technique in SoI high‐voltage lateral double‐diffused metal–oxide–semiconductor transistors using high‐k dielectric;Guo Y.;IEEE Trans. Electron Device Lett.,2015
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1. A Lateral Power p-Channel Trench MOSFET Improved by Variation Vertical Doping;IEEE Transactions on Electron Devices;2021-04
2. Modeling electric field of power metal-oxide-semiconductor field-effect transistor with dielectric trench based on Schwarz–Christoffel transformation*;Chinese Physics B;2019-05-01
3. RF dual-gate-trench LDMOS on InGaAs with improved performance;Indian Journal of Physics;2017-07-29
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