High DC gain self‐cascode structure of OTA design with bandwidth enhancement

Author:

Xu Daiguo1,Liu Lu2,Xu Shiliu2

Affiliation:

1. School of Microelectronics and Solid‐State ElectronicsUniversity of Electronic and Science Technology of China2006, Xiyuan AvenueChengdu610731People's Republic of China

2. Science and Technology on Analog Integrated Circuit LaboratoryNo. 14, Garden Road, Economic and Technological Development Zone, Nanping DistrictChongqing400060People's Republic of China

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Self-cascode and self-biased Dickson charge pump for fast locking wide lock range PLL with reduced phase noise;Engineering Research Express;2024-04-25

2. Rail-to-rail input/output bulk driven class AB operational amplifier with improved composite transistors;Analog Integrated Circuits and Signal Processing;2023-05-30

3. A Miller Compensated Gain Enhanced High Bandwidth Transconductance Amplifier;Wireless Personal Communications;2022-06-29

4. A 0.6-V 11-uW PVT tolerant DTMOS inverter based OTA;Balkan Journal of Electrical and Computer Engineering;2022-04-30

5. A Two-Stage Single-Ended OTA with Improved Composite Transistors;2021 IEEE Nordic Circuits and Systems Conference (NorCAS);2021-10-26

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