Fully differential switched-current memory cell with low charge-injection errors

Author:

Balachandran G.K.,Allen P.E.

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Low Voltage CMOS Switch Capacitor Circuit;2021 7th International Conference on Electrical Energy Systems (ICEES);2021-02-11

2. A Low-Leakage Body-Guarded Analog Switch in 0.35- $\mu\mbox{m}$ BiCMOS and Its Applications in Low-Speed Switched-Capacitor Circuits;IEEE Transactions on Circuits and Systems II: Express Briefs;2015-10

3. A new high-speed, high-resolution open-loop CMOS sample and hold;Analog Integrated Circuits and Signal Processing;2013-09-25

4. Analysis and Design of a Low-Voltage, Low-Power, High-Precision, Class-AB Current-Mode Subthreshold CMOS Sample and Hold Circuit;IEEE Transactions on Circuits and Systems I: Regular Papers;2011-07

5. On the parasitic-sensitivity of switched-capacitor summing-integrator structures for ΣΔ modulators;IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing;2003-09

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