Single instruction multiple data code auto generation for a very long instruction words digital signal processor in sensor‐based systems
Author:
Affiliation:
1. School of Information and Electronics, Beijing Institute of TechnologyBeijingPeople's Republic of China
2. Institution of Microelectronics, Tsinghua UniversityBeijingPeople's Republic of China
Funder
National Natural Science Foundation of China
Publisher
Institution of Engineering and Technology (IET)
Subject
Industrial and Manufacturing Engineering
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-wss.2012.0114
Reference19 articles.
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2. RobellyJ.P.CichonG.SeidelH. andFettweisG.: ‘Automatic code generation for SIMD DSP architectures: an algebraic approach’.Int. Conf. Parallel Computing in Electrical Engineering (PARELEC 2004) 2004 pp.372–375
3. HohenauerM.SchumacherC.LeupersR.AscheidG.MeyrH. andVan SomerenH.: ‘Retargetable code optimization with SIMD instructions’.Proc. Fourth Int. Conf. Hardware/Software Codesign and System Synthesis (CODES + ISSS ′06) 2006 pp.148–153
4. FeanchettiF. andPuschelM.: ‘A SIMD vectorizing compiler for digital signal processing algorithms’.Proc. Int. Parallel and Distributed Processing Symp. (IPDPS 2002) Abstracts and CD‐ROM 2002 pp.20–26
5. LeupersR.: ‘Code selection for media processors with SIMD instructions’.Proc. Design Automation and Test in Europe Conf. and Exhibition 2000 2000 pp.4–8
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