Affiliation:
1. University of Mons, Belgium
Abstract
Multiple processors, microcontrollers, or DSPs have been used in embedded systems to distribute control and data flow according to the application at hand. The recent trends of incorporating multiple cores in the same chip significantly expands the processing power of such heterogeneous systems. However, these trends demand new ways of building and programming embedded systems in order to control cost and complexity. In this context, the authors present an overview on multi-core architectures and their inter-core communication mechanisms, dedicated cores used as accelerators, and hardware reconfiguration providing flexibility on today’s multi-core embedded systems. Finally, they highlight tools, frameworks, and techniques for programming multi-cores and accelerators in order to take advantage of their performance in a robust and cost effective manner.
Reference76 articles.
1. An adaptive message passing MPSoC framework.;G. M.Almeida;International Journal of Reconfigurable Computing,2009
2. Altera. (n.d.a). Implementing FPGA design with OpenCL - A future look. Retrieved April 11, 2012 from http://www.altera.com/education/Webcasts/all/source-files/wc-2011-opencl/player.html
3. Altera. (n.d.b). Nios II software developer’s handbook. Retrieved April 11, 2012 from http://www.altera.com/literature/hb/nios2/n2sw_nii5v2.pdf
4. Asynchronous on-chip networks