Design of a Simple and Low-Cost Calculator in the Laboratory Using FPGA

Abstract

This chapter shows the design guideline of a simple calculator in the laboratory using FPGA board. Since FPGA prototyping is a promising and also challenging alternative for low cost hardware design, the authors have attempted to design some fundamental arithmetic and logical operations using FPGA. Hence, this is also the core of any multiprocessor design. Proposed architecture of the calculator is able to compute any of four basic arithmetic operations such as addition, subtraction, multiplication, division, and some logical operations as specified by the user and the output results are displayed dynamically on the LCD screen of the FPGA board. This architecture may be upgraded for more versatile use such as computation of scientific operations by adding few other sub-modules. Present design of calculator follows very simple algorithm and hardware resource requirement is also minimal. Hence, it can be successfully verified in any laboratory by using even low-level starter FPGA kit.