Low Power VLSI Circuit Design using Energy Recovery Techniques

Abstract

With the rapidly evolving silicon technology, the power density becomes increasingly high. Quadratically related to power, the voltage scaling offers a means of minimizing energy. However, power supply scaling demands less threshold voltage, which rises leakage current. Several low power techniques have been devised. This chapter deals with the non-conventional low power design solutions, based on adiabatic switching theory. In such circuits, the energy rather than getting dissipated during every cycle, is transferred back and forth between the logic and power-clock sources. A brief discussion on the reversible logic circuits will be presented followed by the fully adiabatic and quasi-adiabatic circuits. The use of power-clock sources for operating the adiabatic circuits will also be introduced. The generalized energetics of an adiabatic circuit followed by the typical loss models of the adiabatic families are presented. Some of the adiabatic circuits employing CMOS transistors are introduced in the chapter. A short comparison for the adiabatic circuit leakage models follows.