High-Performance Reconfigurable Computing

Author:

Vestias Mário Pereira1ORCID

Affiliation:

1. Instituto Politécnico de Lisboa, Portugal

Abstract

High-performance reconfigurable computing systems integrate reconfigurable technology in the computing architecture to improve performance. Besides performance, reconfigurable hardware devices also achieve lower power consumption compared to general-purpose processors. Better performance and lower power consumption could be achieved using application-specific integrated circuit (ASIC) technology. However, ASICs are not reconfigurable, turning them application specific. Reconfigurable logic becomes a major advantage when hardware flexibility permits to speed up whatever the application with the same hardware module. The first and most common devices utilized for reconfigurable computing are fine-grained FPGAs with a large hardware flexibility. To reduce the performance and area overhead associated with the reconfigurability, coarse-grained reconfigurable solutions has been proposed as a way to achieve better performance and lower power consumption. In this chapter, the authors provide a description of reconfigurable hardware for high-performance computing.

Publisher

IGI Global

Reference35 articles.

1. Altera. (2015). Retrieved from https://www.altera.com/products/fpga/stratix-series/stratix-10/overview.html

2. EGRA: A Coarse Grained Reconfigurable Architectural Template. IEEE Transactions on Very Large Scale Integration (VLSI);G.Ansaloni;Systems,2011

3. Atak, O., & Atalar, A. (2012). BilRC: An Execution Triggered Coarse Grained Reconfigurable Architecture. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1-10.

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