Affiliation:
1. Instituto Politécnico de Lisboa, Portugal
Abstract
The second generation of Network-on-Chips (NoC) are dynamic or adaptive providing a new set of benefits in terms of area overhead, performance, power consumption, fault tolerance and quality of service compared to the previous generation where the architecture is decided at design time. To improve resource efficiency and performance, the NoC must consider adaptive processes at several architectural levels, including the routing protocols, the router, the network interface and the network topology. This article focuses on adaptive Networks-on-Chip, namely adaptive topologies and adaptive routers.