Processor for Mobile Applications

Author:

Abderazek Ben Abdallah1,Canedo Arquimedes2,Kuroda Kenichi1

Affiliation:

1. University of Aizu, Japan

2. University of Electro-Communications, Japan

Abstract

Mobile processors are used in numerous embedded systems, including laptops, personal digital organizers, wearable computers, cellular phones, mobile Internet terminals, digital cameras, digital cam-coders, smart cards, and sensor networks nodes. Although these systems differ in terms of their communication and computation requirements, they share the common need for low power, security and small memory footprint. This chapter presents the software and hardware architecture and the design results of a low power processor architecture based on queue computation model, which offers an attractive option in the design of mobile and embedded systems.

Publisher

IGI Global

Reference21 articles.

1. High-Level Modeling and FPGA Prototyping of Produced Order Parallel Queue Processor Core

2. Architecture of the Pentium microprocessor

3. Arahata, F., Nishii, O., Uchiyama, K., & Nakagawa, N. (February, 1997). Functional verification of the superscalar SH-4 microprocessor, In Compcon97, the Proceedings of the International conference, Compcon97, (pp. 115-120).

4. Canedo, A. (September, 2006). Code Generation Algorithms for Consumed and Produced Order Queue Machines. Master’s thesis, University of Electro-Communications, Tokyo, Japan.

5. Canedo, A., Abderazek, B. A., & Sowa, M. (May, 2006). A GCC-based Compiler for the Queue Register Processor (QRP-GCC), In IWMST2006, The 2006 International Workshop on Modern Science and Technology, Wuhan, (pp. 250-255).

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