Power and Latency Optimized Deadlock-Free Routing Algorithm on Irregular 2D Mesh NoC using LBDRe

Author:

Verma Renu1,Khan Mohammad Ayoub2ORCID,Zinzuwadiya Amit3

Affiliation:

1. Rama Institute of Technology, Kanpur, Uttar Pradesh, India

2. Centre for Development of Advanced Computing(C-DAC), Noida, Uttar Pradesh, India

3. Amdocs, Gurgaon, Haryana, India

Abstract

Efficient routing is challenging and crucial problem in the irregular mesh NoC topologies because of increasing hardware cost and routing tables. In this paper, the authors propose an efficient deadlock-free routing algorithm for irregular mesh NoCs which reduces the latency and power consumption significantly. The problem with degree priority based routing algorithm is that it cannot remove deadlocks in irregular mesh topologies. Therefore, the authors use the extended Logic Based Distributed Routing (LBDRe) to remove deadlock situations without using any virtual channel in the degree priority based routing algorithm. The proposed LBDRe based technique also removes the dependency on routing tables. The authors further apply odd-Even routing algorithm to LBDRe to ensure that some turns are prohibited to remove deadlocks. Experimental results show that the proposed routing algorithm reduces power consumption by 9–22% and overall average latency by 8–12% with the minimum hardware cost for the irregular mesh NoC topologies.

Publisher

IGI Global

Subject

General Computer Science

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