Performance evaluation of double gate tunnel FET based chain of inverters and 6-T SRAM cell
Author:
Publisher
IOP Publishing
Subject
General Engineering
Link
https://iopscience.iop.org/article/10.1088/2631-8695/ab5f16/pdf
Reference41 articles.
1. Tunnel field-effect transistors as energy-efficient electronic switches
2. High-k double gate junctionless tunnel FET with a tunable bandgap
3. Low-subthreshold-swing tunnel transistors
4. Low-Voltage Tunnel Transistors for Beyond CMOS Logic
5. Device and Circuit Level Performance Comparison of Tunnel FET Architectures and Impact of Heterogeneous Gate Dielectric
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2. Realization of Logic Performance using Double Gate TFET (DG-TFET) and Ge source DG-TFET (s-Ge-TFET);2023 3rd International conference on Artificial Intelligence and Signal Processing (AISP);2023-03-18
3. Performance Analysis of Tunnel Field Effect Transistor for Low‐Power Applications;Intelligent Green Technologies for Sustainable Smart Cities;2022-08-23
4. Half-Select Disturb-Free 10T Tunnel FET SRAM Cell With Improved Noise Margin and Low Power Consumption;IEEE Transactions on Circuits and Systems II: Express Briefs;2021-07
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