Principle and verification of behavior model of gate-controlled SCR with adjustable on-resistance

Abstract

Abstract This paper delineates the implementation of a gate-controlled Silicon Controlled Rectifier (SCR) behavioral model using Cadence software. The model is designed to tackle the absence of gate-control effect characteristics in extant models. This enables more precise simulation of the snapback behavior of such gate-controlled SCR devices under electrostatic discharge (ESD) stress. This work fabricates three types of SCR devices: Traditional SCR(T-SCR), Single-Gate SCR (SG-SCR), and a Double-Gate SCR (DG-SCR). These devices are fabricated using the 0.18 μm CMOS process and varied in the number of gates. The physical principles of the device are validated through two-dimensional electrical simulations. Furthermore, the model results are confirmed by the transmission line pulse (TLP) test results of the final device. The results demonstrate that the simulation results of the gate-controlled SCR behavioral model fit the TLP test results of the three SCR devices. The model’s applicability across different number of fingers devices confirms its scalability. Further, the model was simulated with the HBM equivalent circuit, and the comparison with the actual results confirmed the model’s applicability to HBM simulation.