Abstract
Abstract
Epitaxial graphene on SiC is the most promising substrate for the next generation 2D electronics, due to the possibility to fabricate 2D heterostructures directly on it, opening the door to the use of all technological processes developed for silicon electronics. To obtain a suitable material for large scale applications, it is essential to achieve perfect control of size, quality, growth rate and thickness. Here we show that this control on epitaxial graphene can be achieved by exploiting the face-to-face annealing of SiC in ultra-high vacuum. With this method, Si atoms trapped in the narrow space between two SiC wafers at high temperatures contribute to the reduction of the Si sublimation rate, allowing to achieve smooth and virtually defect free single graphene layers. We analyse the products obtained on both on-axis and off-axis 4H-SiC substrates in a wide range of temperatures (1300 °C–1500 °C), determining the growth law with the help of x-ray photoelectron spectroscopy (XPS). Our epitaxial graphene on SiC has terrace widths up to 10 μm (on-axis) and 500 nm (off-axis) as demonstrated by atomic force microscopy and scanning tunnelling microscopy, while XPS and Raman spectroscopy confirm high purity and crystalline quality.
Subject
Electrical and Electronic Engineering,Mechanical Engineering,Mechanics of Materials,General Materials Science,General Chemistry,Bioengineering
Cited by
8 articles.
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