SiC MOSFET Trap Characterization Based on the Self-built Test Platform

Abstract

Abstract The interface state of SiC/SiO2 is one of the key factors limiting the reliability and performance of SiC MOSFETs. In this paper, we built a dedicated detrap measurement platform to improve the accuracy of trap measurement. Based on the excellent voltage switching time of this platform, the entire voltage switching process can be controlled within 1 µs, and the time resolution is also improved. The original millisecond-level acquisition accuracy is improved to a microsecond level, and the identification range of traps is expanded. The traps were extracted by using the transient current method based on the Bayesian deconvolution algorithm. With this approach, we investigated the trapping mechanism of SiC MOSFETs and mainly characterized the trap locations, energy levels, and trapping time constants. The findings revealed the existence of three different types of traps/defects, Dp1, Dp2, and Dp3, with activation energies of 0.28 eV, 0.035 eV, and 0.084 eV, respectively. The non-destructive characterization of SiC MOSFET defects can be realized through the test platform and Bayesian deconvolution algorithm in this paper, which brings great convenience for trap characterization.