Composite Gate Oxide Method for Improving the Reliability and Leakage Performance of Deep Submicron CMOS Processes

Abstract

Abstract This article aims to address the issues of gate oxide reliability failure and leakage loss in SRAM circuits caused by the introduction of additional high-voltage devices in the 90 nm standard process. It investigates the corner thinning phenomenon using different gate oxide scheme. It analyzes the corresponding relationship between composite gate oxide and reliability and tests the leakage of the SRAM circuit. Research has shown that the use of composite gate oxide can effectively improve corner thinning. The ratio of thermal oxide to HTO in composite gate oxide directly affects GOI/TDDB. At the same time, the use of composite gate oxide also decreases device leakage to a certain extent. The standby leakage of SRAM circuits(Isb) can be reduced from 200 nA to less than 10 nA.