Low power consumption and fast response of low dropout regulator design

Abstract

Abstract A low power consumption and fast response low voltage difference linear regulator circuit is designed for on-chip SOC circuit to achieve low power consumption, fast response, and high stability. The internal design mainly includes a low power bandgap reference circuit, a light and heavy load detection circuit, and a transient enhancement circuit. The circuit is designed with 0.35 μm BCD technology, and the layout design is completed. The VIN is from 2.5 V to 5 V, the VOUT from 2.5 V to 3.3 V, and the maximum load is 250 mA. The simulation results show that the static current is 2.6 μA at normal temperature with no load. When the load jumps, the overshoot is 44 mV and the recovery time is 52 μs, meeting the design requirements of low power consumption and fast response.