Advancing nanoelectronic device modeling through peta-scale computing and deployment on nanoHUB

Author:

Haley Benjamin P,Lee Sunhee,Luisier Mathieu,Ryu Hoon,Saied Faisal,Clark Steve,Bae Hansang,Klimeck Gerhard

Publisher

IOP Publishing

Subject

General Physics and Astronomy

Cited by 19 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Significant Performance Enhancement in strained channel GaAs Gate-All-Around (GAA) nanowire;2022 IEEE International Women in Engineering (WIE) Conference on Electrical and Computer Engineering (WIECON-ECE);2022-12-30

2. Optimization of Resistance Load in 4T-Static Random-Access Memory Cell Based on Silicon Nanowire Transistor;Journal of Nanoscience and Nanotechnology;2018-02-01

3. Atomistic modeling of nonpolar m-plane InGaN disk-in-wire light emitters;Journal of Computational Electronics;2017-06-26

4. A New Approach for Dimensional Optimization of Inverters in 6T-Static Random-Access Memory Cell Based on Silicon Nanowire Transistor;Journal of Nanoscience and Nanotechnology;2017-02-01

5. Nanowire NMOS Logic Inverter Characterization;Journal of Nanoscience and Nanotechnology;2016-06-01

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