Calibration of timing mismatch for TIADC based on error table and fractional delay filter

Abstract

Abstract In this paper, we presents a correcting method based on an error table and fractional delay filter for correcting timing mismatch in a time-interleaved analog-to-digital converter (TIADC). This method uses the ramp signal to estimate timing mismatch and the error table storage error value. A Farrow structure fractional delay filter is utilized to implement the calibration of mismatch. Simulation results show that this method can realize the correction of timing mismatch and suppress the spurious component effectively with a good correction effect.