Bias-dependent Access Resistances Extraction in 0.15 µm GaAs pHEMTs

Abstract

Abstract Devices’ performance analysis and successful circuit design strongly depend on accurate large signal models. This, in turn, requires accurate small signal models. However, the reliable parasitic parameter extraction of GaAs pHEMT greatly influences the accuracy of small signal models, which also greatly influences the extraction of intrinsic elements. The access parasitic source and drain resistances, Rs and Rd , are associated with gate bias due to the two-dimensional charge control. In this work, we directly extract Rs and Rd from S-parameter measurements of the device under test (DUT) under strong inversion operating biases. The proposed method has been validated by simulation and on-wafer measurements. It shows better accuracy than existing arts in a frequency range of 0.5–40 GHz (0.5 GHz step). Furthermore, a 10-15 GHz GaAs pHEMT power amplifier (PA) is employed to further validate the developed method. The test results also validate the developed method.