Author:
Flemming H.,Deppe H.,Wieczorek P.
Abstract
Abstract
A front end and trigger circuit was developed at GSI which is foreseen to be used in a transient recording read out ASIC. It consists of an input buffer with configurable low pass characteristics and a trigger which could be operated as leading edge discriminator as well as switched capacitor trigger which is sensitive to the first derivative of the input signal. The front end was produced on a test ASIC and characterisation results will be presented.
Subject
Mathematical Physics,Instrumentation
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