Artificial neural network on-chip and in-pixel implementation towards pulse amplitude measurement

Author:

Koziol A.,Szczygiel R.,Kuznar D.,Strzalka K.,Wielgosz M.,Otfinowski P.,Maj P.

Abstract

Abstract We present the design of an in-pixel artificial intelligence (AI) for extraction of an amplitude of a pulse generated in semiconductor detector. The AI is design with traditional multi-level perceptron scheme having 6 layers and the total number of 420 parameters. The implementation shows 0.34% measurement accuracy. The AI block is fed by the 6-bit ADC at 5 MHz sampling rate. Standard front-end is optimized for low-noise pulses carrying 1000–3000 electrons. The methodology was tested using FPGA and results are promising. The design is intended to be fabricated and verified in the prototype solution.

Publisher

IOP Publishing

Subject

Mathematical Physics,Instrumentation

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Real-Time Feature Extraction for Readout ASICs: Algorithms and On-Chip Implementations;2023 IEEE Nuclear Science Symposium, Medical Imaging Conference and International Symposium on Room-Temperature Semiconductor Detectors (NSS MIC RTSD);2023-11-04

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