Author:
Aad G.,Calvet T.,Chiedde N.,Faure R.,Fortin E.M.,Laatu L.,Monnier E.,Sur N.
Abstract
Abstract
The ATLAS experiment measures the properties of particles
that are products of proton-proton collisions at the LHC. The
ATLAS detector will undergo a major upgrade before the high
luminosity phase of the LHC. The ATLAS liquid argon calorimeter
measures the energy of particles interacting electromagnetically in
the detector. The readout electronics of this calorimeter will be
replaced during the aforementioned ATLAS upgrade. The new electronic
boards will be based on state-of-the-art field-programmable gate
arrays (FPGA) from Intel allowing the implementation of neural
networks embedded in firmware. Neural networks have been shown to
outperform the current optimal filtering algorithms used to compute
the energy deposited in the calorimeter. This article presents the
implementation of a recurrent neural network (RNN) allowing the
reconstruction of the energy deposited in the calorimeter on Stratix
10 FPGAs. The implementation in high level synthesis (HLS) language
allowed fast prototyping but fell short of meeting the stringent
requirements in terms of resource usage and latency. Further
optimisations in Very High-Speed Integrated Circuit Hardware
Description Language (VHDL) allowed fulfilment of the requirements
of processing 384 channels per FPGA with a latency smaller than
125 ns.
Subject
Mathematical Physics,Instrumentation
Cited by
2 articles.
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