System design and prototyping of the CMS Level-1 Trigger at the High-Luminosity LHC

Abstract

Abstract For the High-Luminosity LHC (HL-LHC) era, the trigger and data acquisition system of the CMS experiment will be entirely replaced. The HL-LHC CMS Level-1 Trigger system will consist of approximately 200 ATCA boards featuring Xilinx UltraScale+ FPGAs connected by 25 Gb/s optical links. These boards will process over 60 Tb/s of detector data within 9.5 μs of the collision to select up to 750 kHz of events for readout. In this paper, we summarise the current status of hardware tests, our progress on system integration tests, and the online software designed to control and monitor these boards.