Author:
Ghanbari Khorram Hamidreza,Kokabi Alireza
Abstract
Purpose
Several ultra-low power and gigahertz current-starved voltage-controlled oscillator (CSVCO) circuits have been proposed and compared here. The presented structures are based on the three-stage hybrid circuit of the carbon nanotube field-effect transistors (CNTFETs) and low-power MOSFETs. The topologies exploit modified and compensated Schmitt trigger comparator parts to demonstrate better consumption power and frequency characteristics. The basic idea in the presented topologies is to compensate the Schmitt trigger comparator part of the basic CSVCO for achieving faster carrier mobility of the holes, reducing transistor leakage current and eliminating dummy transistors.
Design/methodology/approach
This study aims to propose and compare three different comparator-based VCOs that have been implemented using the CNTFETs. The considered circuits are shown to be capable of delivering the maximum 35 tuning frequency in the order of 1 GHz to 5 GHz. A major power thirsty part of the high-frequency ring VCOs is the Schmitt trigger stage. Here, several fast and low-power Schmitt trigger topologies are exploited to mitigate the dissipation power and enhance the oscillation frequency.
Findings
As a result of proposed modifications, more than one order of magnitude mitigation in the VCO power consumption with respect to the previously presented three-stage CSVCO is reported here. Thus, a VCO dissipation power of 3.5 µW at the frequency of 1.1 GHz and the tuning range of 26 per cent is observed for the well-established 32 nm technology and the supply voltage of 1 V. Such a low dissipation power is obtained around the operating frequency of the battery-powered cellular phones. In addition, using the p-carrier mobility compensation and enhancing the rise time of the Schmitt trigger part of the CSVCO, a maximum of 2.38 times higher oscillation frequency and 72 per cent wider tuning range with respect to Rahane and Kureshi (2017) are observed. Simultaneously, this topology exhibits an average of 20 per cent reduction in the power consumption.
Originality/value
Several new VCO topologies are presented here, and it is shown that they can significantly enhance the power dissipation of the GHz CSVCOs.
Subject
Electrical and Electronic Engineering,Industrial and Manufacturing Engineering
Reference41 articles.
1. Monolithic integration of cmos vlsi and carbon nanotubes for hybrid nanotechnology applications;IEEE Transactions on Nanotechnology,2008
2. A low power current-reuse lc-vco with an adaptive body-biasing technique;AEU – International Journal of Electronics and Communications,2018
3. Benchmarking nanotechnology for high-performance and low-power logic transistor applications;IEEE Transactions on Nanotechnology,2005
4. Cho, T.S., Lee, K.J., Pan, T., Kong, J. and Chandrakasan, A.P. (2007), “Design and characterization of cnt-cmos hybrid systems”, MTL Annual Research Report.
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