A high performance RC-INV triggering SCR under 0.25 µm process

Author:

Su Xuebing,Wang Yang,Jin Xiangliang,Yang Hongjiao,Zhang Yuye,Yang Shuaikang,Yu Bo

Abstract

Purpose As it is known, the electrostatic discharge (ESD) protection design of integrated circuit is very important, among which the silicon controlled rectifier (SCR) is one of the most commonly used ESD protection devices. However, the traditional SCR has the disadvantages of too high trigger voltage, too low holding voltage after the snapback and longer turn-on time. The purpose of this paper is to design a high-performance SCR in accordance with the design window under 0.25 µm process, and provide a new scheme for SCR design to reduce the trigger voltage, improve the holding voltage and reduce the turn-on time. Design/methodology/approach Based on the traditional SCR, an RC-INV trigger circuit is introduced. Through theoretical analysis, TCAD simulation and tape-out verification, it is shown that RC-INV triggering SCR can reduce the trigger voltage, increase the holding voltage and reduce the turn-on time of the device on the premise of maintaining good robustness. Findings The RC-INV triggering SCR has great performance, and the test shows that the transmission line pulse curve with almost no snapback can be obtained. Compared with the traditional SCR, the trigger voltage decreased from 32.39 to 16.24 V, the holding voltage increased from 3.12 to 14.18 V and the turn-on time decreased from 29.6 to 16.6 ns, decreasing by 43.9% the level of human body model reached 18 kV+. Originality/value Under 0.25 µm BCD process, this study propose a high-performance RC-INV triggering SCR ESD protection device. The work presented in this paper has a certain guiding significance for the design of SCR ESD protection devices.

Publisher

Emerald

Subject

Electrical and Electronic Engineering,Surfaces, Coatings and Films,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Reference16 articles.

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2. A latch-up-free LVTSCR with improved overshoot characteristic for ESD protection in 40 nm CMOS process;Semiconductor Science and Technology,2021

3. A new dual-direction SCR with high holding voltage and low dynamic resistance for 5 V application;IEEE Journal of the Electron Devices Society,2019

4. An enhanced MLSCR structure suitable for ESD protection in advanced epitaxial CMOS technology;IEEE Transactions on Electron Devices,2019

5. ESD robustness improving for the low-voltage triggering silicon-controlled rectifier by adding NWell at cathode;Solid-State Electronics,2017

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