Using computer models to identify optimal conditions for flip‐chip assembly and reliability-Reference-Cited by-同舟云学术

Using computer models to identify optimal conditions for flip‐chip assembly and reliability

Published:2002-03 Issue:1 Volume:28 Page:14-20
ISSN:0305-6120
Container-title:Circuit World
language:en
Short-container-title:Circuit World

Author:

Bailey Christopher,Lu Hua,Glinski Greg,Wheeler Daniel,Hamilton Phil,Hendriksen Mike,Smith Brian

Publisher

Emerald

Subject

Electrical and Electronic Engineering,Industrial and Manufacturing Engineering

Reference19 articles.

1. An integrated modeling approach to solder joint formation

2. Bailey, C. McManus, K. Wheeler, D., Lu, H. and Chow, P. (1999b), “Large‐scale parallel simulations for the assembly of flip‐chip components to printed circuit boards”,Proceedings of InterPACK ’99 Conference, Advances in Electronic Packaging, Vol. 26 No. 1349‐1354, ASME, Honolulu, HI.

3. Chandler, N. (1998), “Industry’s stated needs”,ITIC Survey, presented at EMERnet launch meeting, December.

4. New challenges in solder-paste printing

5. Simulation of the stencil printing process [solder pastes]

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