Microscopy of VLSI oxides

Abstract

The oxide of silicon and other insulating films form an integral part of every VLSI circuit (e.g. Fig. 1). Thin gate oxide(SiO2) in the thickness range of 10-20 nm (5-10 nm) is needed for submicron (quatermicron) devices. For such devices, characterization of surface roughness at Si/SiO2 interfaces becomes increasingly important because it is expected to affect field-dependent dielectric breakdown (FDDB), time-dependent dielectric breakdown (TDDB) and carrier mobility of MOS FETs more sensitively at necessitated higher operating electric fields. The Si/SiO2 interface is usually considered as the boundary between Si lattice image and granular SiO2 image.P-type, CZ- Si(001) substrates with resistivity of 10-13 Ωcm were first cleaned by the RCA method and were oxidized in aquartz tube to 16nm thickness: OC2=100% at 900°C for 53 min (dry oxide), O2/H2=1/4 for 11 min (wet oxide). Some MOS structured samples were also studied. Some dry oxide and reoxidized nitrided oxide (ONO) of 7nm thickness were formed by rapid thermal process for electron mobility study.