A 60 GHz eight-element phased-array receiver front-end in 0.25 µm SiGe BiCMOS technology

Abstract

This paper presents the design of an eight-element 60 GHz phased-array receiver chip with interference mitigation capability, fabricated in 0.25 μm SiGe BiCMOS technology. Each receiver element contains a low noise amplifier (LNA) and a vector-modulator that supports high-resolution amplitude and phase control. A fully differential power combining network follows the eight elements. The chip also includes an active power divider, a down conversion mixer, and fully integrated 48 GHz PLL to demonstrate the IF down-conversion. With LNA, a phase shifter and hybrid active and passive power combining network, each receiver path achieves 18 dB of gain, 360° phase shift in steps less than 3°, 20 dB amplitude control, and 4 GHz 3 dB-bandwidth and input referred 1 dB compression point P1 dB of each element is of −22 dBm. Each receiver element dissipates in total 132 mW. The phased-array receiver shows more than 25 dB of signal to interference noise ratio, by means of amplitude and phase control.