Microstructural Analysis of Solder Bump Fabricated by Sn Electroplating on a PCB Substrate
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Published:2021-04-05
Issue:4
Volume:59
Page:233-238
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ISSN:1738-8228
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Container-title:Korean Journal of Metals and Materials
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language:en
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Short-container-title:Korean J. Met. Mater.
Author:
Kim Sang-Hyeok,Kim Seong-Jin,Shin Han-Kyun,Park Hyun,Heo Cheol-Ho,Moon Seongjae,Lee Hyo-Jong
Abstract
To manufacture finer solder bumps, the SR and DFR patterns were filled using a Sn electroplating process instead of the microball process currently used in BGA technology, and the solder bump shape was fabricated through a reflow process. The microstructure of the solder bump was investigated by EBSD and TEM measurements. The EBSD results showed that the grain size of the Sn structure became finer after the reflow treatment and a scallop shape of Cu6Sn5 was formed on the Cu UBM. However, the Cu3Sn phase was difficult to measure in the EBSD measurement. The Cu3Sn compound could be investigated with TEM analysis. The Cu3Sn phase also existed in the Sn region, with a size of several tens of nanometers, due to the eutectic reaction. The volume fraction of the Cu6Sn5 phase in the Sn region could be calculated from the TEM image, and the concentration of copper dissolved in the liquid tin during the reflow process could be estimated from the volume fraction. It was possible to observe the Cu3Sn and Cu6Sn5 lattice images through high resolution TEM analysis, but it was difficult to observe the lattice coherency between the two phases because both were polycrystalline. Based on the results of this study, it is expected that solder bumps with a diameter of less than 100 µm can be robustly manufactured through the Sn electroplating process.
Funder
Ministry of Education
National Research Foundation of Korea
Publisher
The Korean Institute of Metals and Materials
Subject
Metals and Alloys,Surfaces, Coatings and Films,Modeling and Simulation,Electronic, Optical and Magnetic Materials