Power estimation methods in digital circuit design
Author:
Publisher
Allerton Press
Subject
Electrical and Electronic Engineering,Condensed Matter Physics,Instrumentation
Link
http://link.springer.com/content/pdf/10.3103/S8756699009060132.pdf
Reference28 articles.
1. M. Pedram, “Power Simulation and Estimation in VLSI Circuits,” in The VLSI Handbook (The CRC Press-IEEE Press, Boca Raton, 1999), pp. 18–27.
2. C.-Y. Tsui, J. Monteiro, M. Pedram, et al., “Power Estimation Methods for Sequential Logic Circuits,” IEEE Trans. VLSI Syst. 3(3), 404–416 (1995).
3. A. K. Murugavel and N. Ranganathan, “Power Estimation of Sequential Circuits Using Hierarchical Colored Hardware Petri Net Modeling,” in Proc. of the Int. Symp. on Low Power Electronics and Design (ISLPED’02) (Monterey, 2002), pp. 267–270.
4. S. Bhanja and N. Ranganathan, “Switching Activity Estimation of VLSI Circuits Using Bayesian Networks,” IEEE Trans. VLSI Systems 11(4), 558–567 (2003).
5. S. S. Ramani and S. Bhanja, “Any-Time Probabilistic Switching Model Using Bayesian Networks,” in Proc. of the Int. Symp. on Low Power Electronics and Design (ISLPED’04) (Newport, 2004), pp. 86–89.
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