Validation of Loop Parallelization and Loop Vectorization Transformations

Author:

Dutta Sudakshina1,Sarkar Dipankar1,Rawat Arvind1,Singh Kulwant1

Affiliation:

1. Indian Institute of Technology Kharagpur, India

Publisher

SCITEPRESS - Science and and Technology Publications

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Equivalence by Canonicalization for Synthesis-Backed Refactoring;Proceedings of the ACM on Programming Languages;2024-06-20

2. Lockstep Composition for Unbalanced Loops;Tools and Algorithms for the Construction and Analysis of Systems;2023

3. The Feasibility of Establishing Electric Vehicle Charging Stations at Public Hotspots in Sri Lanka;2019 Moratuwa Engineering Research Conference (MERCon);2019-07

4. Semantic program alignment for equivalence checking;Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation;2019-06-08

5. Validation of parallelizing transformations of sequential programs;Concurrency and Computation: Practice and Experience;2017-01-23

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