Ground plane and selective buried oxide based planar junctionless transistor-Reference-Cited by-同舟云学术

Ground plane and selective buried oxide based planar junctionless transistor

Published:2021-10-20 Issue:1-2 Volume:76 Page:1-7
ISSN:0016-1136
Container-title:Frequenz
language:en
Short-container-title:

Author:

Murshid Asim M.¹^ORCID,Bashir Faisal²^ORCID

Affiliation:

1. Software Department , College of Computer Science and Information Technology, University of Kirkuk , Kirkuk , Iraq

2. Department of Electronics and Insutrumentation technology , University of Kashmir , Srinagar , J&K , India

Abstract

Abstract In this work, we demonstrate a ground plane (GP) based Selective Buried Oxide (SELBOX) Junctionless Transistor (JLT), named as GP-SELBOX-JLT. The use of GP and SELBOX in the proposed device reduces the electric field and enhances volume depletion in the channel, hence improves I ON/I OFF ratio and scalability. Using calibrated 2-D simulation, we have shown that proposed device exhibits better Short Channel Effect (SHE) immunity as compared to SOI-JLT. Therefore, the proposed GP-SELBOX-JLT can be scaled without degrading the performance in sub 20 nm regime. In addition, the ac study has shown that the cutoff frequency (f T) of GP-SELBOX-JLT is almost equal to conventional SOI-JLT.

Publisher

Walter de Gruyter GmbH

Subject

Electrical and Electronic Engineering

Link

https://www.degruyter.com/document/doi/10.1515/freq-2021-0059/pdf

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