1. Azizi, N., Yiannacouras, P., Gate oxide breakdown. ECE1768 – Reliability of Integrated Circuits, 2012. http://ambientelectrons.org/wp-content/uploads/2012/02/presentation.pdf (accessed 21. 3. 2018).
2. BBC News, Digital memories survive extremes, 2004. http://news.bbc.co.uk/2/hi/technology/3939333.stm (accessed 21. 3. 2018).
3. Cai, U., Yalcin, G., Mutlu, O., Haratsch, E., Cristal, A., Unsal, O., Mai, K.: Error analysis and retention-aware error manangement for NAND flash memory. Intel Technology Journal. 17 (1) (2013): 140–164. https://users.ece.cmu.edu/~omutlu/pub/flash-error-analysis-and-management_itj13.pdf (accessed 21. 3. 2018).
4. Cai, Y., Haratsch, E., Mai, K., Mutlu, O.: Data retention in MLC NAND flash memory: Characterization, optimization, and recovery. In: IEEE 21st International Symposium on High Performance Computer Architecture, HPCA 2015: 551–563.
5. Centon, Flash chip types – SLC, MLC and TLC. http://www.centon.com/support/130-flash-chip-types-slc-mlc-and-tlc (accessed 21. 3. 2018).