Current mode pulse width modulation/pulse position modulation based on phase lock loop-Reference-Cited by-同舟云学术

Current mode pulse width modulation/pulse position modulation based on phase lock loop

Published:2017-05-01 Issue:3 Volume:68 Page:180-187
ISSN:1339-309X
Container-title:Journal of Electrical Engineering
language:en
Short-container-title:

Author:

Wisartpong Pichet¹,Silaphan Vorapong¹,Kurutach Sunee¹,Wardkein Paramote²

Affiliation:

1. Faculty of Engineering, Department of Telecommunication , Mahanakorn University of Technology , Nong Chok, Bangkok 10530 , Thailand

2. Faculty of Engineering, Department of Telecommunication , King Mongkut’s institute of Technology Ladkrabang , Ladkrabang, Bangkok 10520 , Thailand

Abstract

Abstract In this paper, the fully integrated CMOS current mode PLL with current input injects at the place of input or output of the loop filter without summing amplifier circuit. It functions as PPM and PWM circuit is present. In addition, its frequency response is an analysis which electronic tuning BPF and LPF are obtained. The proposed circuit has been designed with 0.18 μm CMOS technology. The simulation results of this circuit can be operated at 2.5 V supply voltage, at center frequency 100 MHz. The linear range of input current can be adjusted from 43 μA to 109 μA, and the corresponding duty cycle of pulse width output is from 93% to 16% and the normalized pulse position is from 0.93 to 0.16. The power dissipation of this circuit is 4.68 mW with the total chip area is 28 μm × 60 μm.

Publisher

Walter de Gruyter GmbH

Reference11 articles.

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